MIXAL/machine_8h_source.html

#ifndef INCLUDE_MACHINE_H_

#define INCLUDE_MACHINE_H_


#include <map>

#include <vector>

#include <string>

#include <memory>

#include <unordered_map>

#include "registers.h"

#include "flags.h"

#include "memory.h"

#include "parser.h"

#include "instructions.h"

#include "io.h"

#include "errors.h"


namespace mixal {


using InstructionWord = ComputerWord;


class Computer {

 public:

    static const int NUM_INDEX_REGISTER = 6;

    static const int NUM_MEMORY = 4000;

    static const int NUM_IO_DEVICE = 21;

    Register5 rA,  rX;

    Register2 rI1 , rI2, rI3, rI4, rI5, rI6, rJ;

    bool overflow;

    ComparisonIndicator comparison;

    ComputerWord memory[NUM_MEMORY];

    std::vector<IODevice*> devices;

    Computer();

    ~Computer();


    Register2& rI(int index);

    const ComputerWord& memoryAt(int16_t index) const;

    ComputerWord& memoryAt(int16_t index);

    IODevice* getDevice(int32_t index);

    void waitDevice(IODevice* device);

    void waitDevices();

    ComputerWord& getDeviceWordAt(int32_t device, int32_t index);


    void reset();

    inline int line() const { return _lineOffset; }

    inline int elapsed() const { return _elapsed; }


    std::string getSingleLineSymbol();

    void executeSingle();

    void executeUntilSelfLoop();

    void executeUntilHalt();

    void executeSingle(ParsedResult* instruction);

    void executeSingle(const InstructionWord& instruction);

    void executeSinglePesudo(ParsedResult* instruction);


    void loadCodes(const std::string& codes, bool addHalt = true);

    void loadCodes(const std::vector<std::string>& codes, bool addHalt = true);


 private:

    int32_t _pesudoVarIndex;

    int32_t _lineOffset;

    int32_t _elapsed;

    std::unordered_map<std::string, AtomicValue> _constants;


    std::string getPesudoSymbolname();


    int32_t getIndexedAddress(const InstructionWord& instruction, bool checkRange = false);

    void copyToRegister5(const InstructionWord& instruction, const ComputerWord& word, Register5* reg);

    void copyFromRegister5(const InstructionWord& instruction, const Register5& reg, ComputerWord* word);

    void copyToRegister2(const InstructionWord& instruction, const ComputerWord& word, Register2* reg);


    int32_t checkRange(int32_t value, int bytes = 5);


    uint8_t getAX(int index) const;

    void setAX(int index, uint8_t value);


    void executeADD(const InstructionWord& instruction);

    void executeSUB(const InstructionWord& instruction);

    void executeMUL(const InstructionWord& instruction);

    void executeDIV(const InstructionWord& instruction);


    void executeNUM();

    void executeCHAR();


    void executeSLA(const InstructionWord& instruction);

    void executeSRA(const InstructionWord& instruction);

    void executeSLAX(const InstructionWord& instruction);

    void executeSRAX(const InstructionWord& instruction);

    void executeSLC(const InstructionWord& instruction);

    void executeSRC(const InstructionWord& instruction);

    void executeMOVE(const InstructionWord& instruction);


    void executeLD(const InstructionWord& instruction, Register5* reg);

    void executeLDi(const InstructionWord& instruction);

    void executeLDN(const InstructionWord& instruction, Register5* reg);

    void executeLDiN(const InstructionWord& instruction);

    void executeST(const InstructionWord& instruction, Register5* reg);

    void executeSTi(const InstructionWord& instruction);

    void executeSTJ(const InstructionWord& instruction);

    void executeSTZ(const InstructionWord& instruction);


    void executeJBUS(const InstructionWord& instruction);

    void executeIOC(const InstructionWord& instruction);

    void executeIN(const InstructionWord& instruction);

    void executeOUT(const InstructionWord& instruction);

    void executeJRED(const InstructionWord& instruction);


    void executeJMP(const InstructionWord& instruction);

    void executeJSJ(const InstructionWord& instruction);

    void executeJOV(const InstructionWord& instruction);

    void executeJNOV(const InstructionWord& instruction);

    void executeJL(const InstructionWord& instruction);

    void executeJE(const InstructionWord& instruction);

    void executeJG(const InstructionWord& instruction);

    void executeJGE(const InstructionWord& instruction);

    void executeJNE(const InstructionWord& instruction);

    void executeJLE(const InstructionWord& instruction);

    void executeJN(const InstructionWord& instruction, Register5* reg);

    void executeJZ(const InstructionWord& instruction, Register5* reg);

    void executeJP(const InstructionWord& instruction, Register5* reg);

    void executeJNN(const InstructionWord& instruction, Register5* reg);

    void executeJNZ(const InstructionWord& instruction, Register5* reg);

    void executeJNP(const InstructionWord& instruction, Register5* reg);

    void executeJiN(const InstructionWord& instruction);

    void executeJiZ(const InstructionWord& instruction);

    void executeJiP(const InstructionWord& instruction);

    void executeJiNN(const InstructionWord& instruction);

    void executeJiNZ(const InstructionWord& instruction);

    void executeJiNP(const InstructionWord& instruction);


    void executeINC(const InstructionWord& instruction, Register5* reg);

    void executeDEC(const InstructionWord& instruction, Register5* reg);

    void executeENT(const InstructionWord& instruction, Register5* reg);

    void executeENN(const InstructionWord& instruction, Register5* reg);

    void executeINCi(const InstructionWord& instruction);

    void executeDECi(const InstructionWord& instruction);

    void executeENTi(const InstructionWord& instruction);

    void executeENNi(const InstructionWord& instruction);


    void executeCMP(const InstructionWord& instruction, Register5* reg);

    void executeCMPi(const InstructionWord& instruction);


    void executeEQU(ParsedResult* instruction);

    void executeORIG(ParsedResult* instruction);

    void executeCON(ParsedResult* instruction);

};


};  // namespace mixal


#endif  // INCLUDE_MACHINE_H_